• DocumentCode
    1242598
  • Title

    A BIST scheme for a SNR, gain tracking, and frequency response test of a sigma-delta ADC

  • Author

    Toner, Michael F. ; Roberts, Gordon W.

  • Author_Institution
    Dept. of Electr. Eng., McGill Univ., Montreal, Que., Canada
  • Volume
    42
  • Issue
    1
  • fYear
    1995
  • fDate
    1/1/1995 12:00:00 AM
  • Firstpage
    1
  • Lastpage
    15
  • Abstract
    Built-in-self test (BIST) for VLSI systems is desirable in order to reduce the cost per chip of production-time testing by the manufacturer. In addition, it can provide the means to perform in-the-field diagnostics. This paper discusses a mixed analog-digital BIST (MADBIST) for a signal-to-noise-ratio test, gain tracking test, and frequency response test of a sigma-delta analog-to-digital converter. The MADBIST strategy for the SNR, GT, and FR tests of the ADC is introduced, accuracy issues are discussed, and experimental results are presented
  • Keywords
    VLSI; built-in self test; frequency response; integrated circuit testing; interference (signal); mixed analogue-digital integrated circuits; sigma-delta modulation; A/D convertor; BIST scheme; MADBIST strategy; SNR test; VLSI systems; analog-to-digital converter; built-in-self test; frequency response test; gain tracking test; in-the-field diagnostics; mixed analog-digital BIST; sigma-delta ADC; signal/noise ratio test; Analog-digital conversion; Built-in self-test; Costs; Delta-sigma modulation; Frequency response; Group technology; Manufacturing; Signal to noise ratio; System testing; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1057-7130
  • Type

    jour

  • DOI
    10.1109/82.363546
  • Filename
    363546