DocumentCode
1243728
Title
IDDQ testing on a custom automotive IC
Author
Mallarapu, Shobha R. ; Hoffman, Albert J.
Author_Institution
Delco Electron. Corp., Kokomo, IN, USA
Volume
30
Issue
3
fYear
1995
fDate
3/1/1995 12:00:00 AM
Firstpage
295
Lastpage
299
Abstract
This paper describes the implementation of IDDQ testing combined with high voltage testing on a CMOS custom automotive IC. Special design considerations to accommodate IDDQ testing are discussed in this paper. IDDQ pattern generation, data collection and limit setting are presented. IDDQ patterns developed for this IC, together with the fault-graded patterns, achieved a higher fault coverage compared to the conventional single stuck-at-fault approach alone. The combination of the IDDQ test and the voltage screen test resulted in a higher reliability of the device
Keywords
CMOS digital integrated circuits; application specific integrated circuits; automotive electronics; fault location; integrated circuit testing; logic testing; CMOS custom automotive IC; IDDQ pattern generation; IDDQ testing; data collection; fault coverage; fault-graded patterns; limit setting; quiescent current monitoring; Automotive engineering; CMOS integrated circuits; Circuit faults; Circuit testing; Fault detection; Integrated circuit testing; Monitoring; Power supplies; Silicon; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.364444
Filename
364444
Link To Document