A fast single-chip implementation of 8192 complex point FFT

Large-scale single-frequency networks are now being considered in Europe as very promising network topologies to achieve drastic savings in spectrum usage for digital terrestrial television transmission. Such networks are possible using the COFDM system, with large guard intervals (more than 200 μs) to absorb long echoes. In order to limit the spectral efficiency loss to about 20%, very long size fast Fourier transforms (up to 8 K complex points) have to be performed in real time for the demodulation of every COFDM symbol (every 1 ms). This paper presents the first VLSI single chip dedicated to the computation of direct or inverse fast Fourier transforms of up to 8192 complex points. Due to its pipelined architecture, it can perform an 8 K FFT every 400 μs and a 1 K FFT every 50 μs. All the storage is onchip, so that no external memories are required. A new internal result scaling technique, called convergent block floating point, has been introduced in order to minimize the required storage for a given quantization noise, The chip, 1 cm² large with 1.5 million transistors, has been designed in a 3.3 V-0.5 μm triple-level metal CMOS process and is fully functional. The 8 K complex FFT function could therefore be introduced in the coming years in digital terrestrial TV receivers at low cost