Title :
Circuit-level modeling of soft errors in integrated circuits
Author :
Walstra, Steven V. ; Dai, Changhong
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
This paper describes the steps necessary to develop a soft-error methodology that can be used at the circuit-simulation level for accurate nominal soft-error prediction. It addresses the role of device simulations, statistical simulation, analytical soft-error rate (SER) model development, and SER-model calibration. The resulting approach is easily automated and generic enough to be applied to any type of circuit for estimation of the nominal SER.
Keywords :
alpha-particle effects; circuit simulation; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; neutron effects; analytical soft error rate; circuit level modeling; circuit level reliability; circuit simulation level; integrated circuits; model calibration; model development; nominal soft error prediction; soft error estimation; statistical simulation; Analytical models; Calibration; Circuit simulation; Circuit testing; Integrated circuit modeling; Latches; Logic circuits; Predictive models; Timing; Voltage; Circuit-level reliability; soft-error estimation;
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
DOI :
10.1109/TDMR.2005.855684
