DocumentCode
1245148
Title
SiGe HBTs on bonded SOI incorporating buried silicide layers
Author
Bain, M. ; Mubarek, H. A W El ; Bonar, J.M ; Wang, Y. ; Buiu, O. ; Gamble, H. ; Armstrong, B.M. ; Hemment, Peter L.F. ; Hall, Steven ; Ashburn, Peter
Author_Institution
Dept. of Electr. & Electron. Eng., Queen´´s Univ., Belfast, UK
Volume
52
Issue
3
fYear
2005
fDate
3/1/2005 12:00:00 AM
Firstpage
317
Lastpage
324
Abstract
A technology is described for fabricating SiGe heterojunction bipolar transistors (HBTs) on wafer-bonded silicon-on-insulator (SOI) substrates that incorporate buried tungsten silicide layers for collector resistance reduction or buried groundplanes for crosstalk suppression. The physical structure of the devices is characterized using cross section transmission electron microscopy, and the electrical properties of the buried tungsten silicide layer are characterized using sheet resistance measurements as a function of bond temperature. Possible contamination issues associated with the buried tungsten silicide layer are investigated by measuring the collector/base reverse diode tics. A resistivity of 50 μΩcm is obtained for the buried silicide layer for a bond anneal of 120 min at 1000°C. Collector/base reverse diode tics show a voltage dependence of approximately V12/, indicating that the leakage current is due to Shockley-Read-Hall generation in the depletion region. Fitting of the current-voltage tics gives a generation lifetime of 90 ns, which is as expected for the collector doping of 7 × 1017 cm-3. These results indicate that the buried tungsten silicide layer does not have a serious impact on junction leakage.
Keywords
Ge-Si alloys; annealing; buried layers; contamination; electrical resistivity; heterojunction bipolar transistors; leakage currents; silicon-on-insulator; transmission electron microscopy; tungsten compounds; wafer bonding; 1000 C; 120 min; 90 ns; HBT; Shockley-Read-Hall generation; SiGe; WSi2; bond temperature; bonded SOI; buried groundplanes; buried tungsten silicide layers; collector resistance reduction; collector-base reverse diode tics; cross section transmission electron microscopy; crosstalk suppression; current-voltage tics; electrical properties; heterojunction bipolar transistors; junction leakage; leakage current; sheet resistance measurement; silicon-on-insulator substrates; voltage dependence; wafer bonding; Diodes; Electric resistance; Electrical resistance measurement; Germanium silicon alloys; Heterojunction bipolar transistors; Silicides; Silicon germanium; Silicon on insulator technology; Tungsten; Wafer bonding; Buried layer; SiGe heterojunction bipolar transistors (HBTs); groundplane; silicon-on-insulator (SOI); tungsten silicide; wafer bonding;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2005.843872
Filename
1397980
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