• DocumentCode
    1245882
  • Title

    An architecture for a DSP field-programmable gate array

  • Author

    Agarwala, M. ; Balsara, P.T.

  • Author_Institution
    Texas Instrum. Inc., Dallas, TX, USA
  • Volume
    3
  • Issue
    1
  • fYear
    1995
  • fDate
    3/1/1995 12:00:00 AM
  • Firstpage
    136
  • Lastpage
    141
  • Abstract
    This paper describes an application specific architecture for field-programmable gate arrays (FPGAs). Emphasis is placed on the logic module architecture and channel segmentation for the FPGAs targeted for application areas related to digital signal processing (DSP). The proposed logic module architecture is well-suited for efficient implementation of frequently used logic functions in the DSP application area. This is mainly because it is possible to implement most of these functions using one logic module, which results in a reduction in both the net lengths and the number of antifuses used. The performance improvements are achieved by customizing the logic module architecture and the programmable interconnect to suit the requirements of DSP applications.<>
  • Keywords
    application specific integrated circuits; digital signal processing chips; field programmable gate arrays; programmable logic arrays; DSP field-programmable gate array; antifuses; application specific architecture; channel segmentation; logic functions; logic module architecture; net lengths; programmable interconnect; Delay; Digital signal processing; Field programmable gate arrays; Integrated circuit interconnections; Logic circuits; Logic design; Logic functions; Logic gates; Logic programming; Programmable logic arrays;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/92.365460
  • Filename
    365460