Concurrent packaging architecture design

Author

Cao, Lipeng ; Krusius, J. Peter

Author_Institution

Sch. of Electr. Eng., Cornell Univ., Ithaca, NY, USA

Volume

18

Issue

1

fYear

1995

fDate

2/1/1995 12:00:00 AM

Firstpage

66

Lastpage

73

Abstract

Packaging constitutes one of the primary limits on the performance and partitioning of high density electronic systems. A concurrent design methodology for the design of physical packaging hierarchies is presented. Architecture, electrical performance, and energy management aspects of the system are included. The CAD system AUDIT implements this design methodology. The concurrent design capability has been illustrated using model systems derived from high speed Digital Equipment 3000/500 (Alpha) and IBM RS/6000 workstations. It is found that the choice of the packaging architecture as well as the impact of packaging on system performance is determined by the partitioning of the system

Keywords

CAD; concurrent engineering; electronic engineering computing; packaging; AUDIT; CAD system; concurrent design; design methodology; packaging architecture design; Central Processing Unit; Circuit simulation; Design automation; Design methodology; Electronics packaging; Energy management; Integrated circuit modeling; Packaging machines; Power system modeling; Wiring;

fLanguage

English

Journal_Title

Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on

Publisher

ieee

ISSN

1070-9894

Type

jour

DOI

10.1109/96.365491

Filename

365491