• DocumentCode
    1246703
  • Title

    Compiler-based multiple instruction retry

  • Author

    Chung-Chi Jim Li ; Kwei Chen, Shyh ; Fuchs, W.K. ; Hwu, Wen-Mei W.

  • Author_Institution
    Illinois Univ., Champaign, IL, USA
  • Volume
    44
  • Issue
    1
  • fYear
    1995
  • fDate
    1/1/1995 12:00:00 AM
  • Firstpage
    35
  • Lastpage
    46
  • Abstract
    This paper describes a compiler-based approach to provide multiple instruction rollback capability for general purpose processor registers. The objective is achieved by having the compiler remove all forms of N-instruction antidependencies. Pseudoregister antidependencies are removed by loop protection, node splitting, and loop expansion techniques; machine register antidependencies are prevented by introducing antidependency constraints in the interference graph used by the register allocator. To support separate compilation, inter-procedural antidependency constraints are added to the code generator to guarantee the termination of machine register antidependencies across procedure boundaries. The algorithms have been implemented in the IMPACT C compiler. Experiments illustrating the effectiveness of this approach are described
  • Keywords
    fault tolerant computing; instruction sets; program compilers; software fault tolerance; IMPACT C compiler; N-instruction antidependencies; compiler-based multiple instruction retry; general purpose processor registers; interference graph; loop expansion techniques; loop protection; machine register antidependencies; node splitting; pseudoregister antidependencies; Central Processing Unit; Computer aided instruction; Contracts; Counting circuits; Delay effects; Fault tolerance; Interference constraints; Protection; Protocols; Registers;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.368011
  • Filename
    368011