• DocumentCode
    1247241
  • Title

    Markov chains and probabilistic computation-a general framework for multiplexed nanoelectronic systems

  • Author

    Qi, Yan ; Gao, Jianbo ; Fortes, José A B

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Florida, Gainesville, FL, USA
  • Volume
    4
  • Issue
    2
  • fYear
    2005
  • fDate
    3/1/2005 12:00:00 AM
  • Firstpage
    194
  • Lastpage
    205
  • Abstract
    In emerging nanotechnologies, reliable computation will have to be carried out with unreliable components being integral parts of computing systems. One promising scheme for designing these systems is von Neumann´s multiplexing technique. Using bifurcation theory and its associated geometrical representation, we have studied a NAND-multiplexing system recently proposed. The behavior of the system is characterized by the stationary distribution of a Markov chain, which is uni- or bi-modal, when the error probability of NAND gates is larger or smaller than the threshold value, respectively. The two modes and the median of the stationary distribution are the keys to the characterization of the system reliability. Examples of potential future nanochips are used to illustrate how the NAND-multiplexing technique can lead to high system reliability in spite of large gate error probability while keeping the cost of redundancy moderate. In nanoelectronic systems, while permanent defects can be taken care of by reconfiguration, probabilistic computation schemes can incorporate another level of redundancy so that high tolerance of transient errors may be achieved. The Markov chain model is shown to be a powerful tool for the analysis of multiplexed nanoelectronic systems.
  • Keywords
    Markov processes; NAND circuits; error statistics; logic gates; multiplexing; nanoelectronics; Markov chains; NAND gates; NAND-multiplexing system; bifurcation theory; gate error probability; multiplexed nanoelectronic systems; probabilistic computation; redundancy; transient errors; von Neumanns multiplexing method; Bifurcation; Circuit faults; Costs; Error probability; Fault tolerance; Nanoscale devices; Power system modeling; Redundancy; Reliability; Wires; Fault tolerance; Markov chain; NAND multiplexing; probabilistic computation;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2004.834192
  • Filename
    1405996