Title :
A temperature-insensitive self-recharging circuitry used in DRAMs
Author :
Wang, Chua-Chin ; Tseng, Yih-Long ; Chiu, Chih-Chiang
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
fDate :
3/1/2005 12:00:00 AM
Abstract :
This paper presents a practical self-recharging circuitry for DRAMs. The proposed self-recharging circuitry not only reduces the standby power by monitoring the voltage drop caused by the data loss of a memory cell but also adjusts the recharging period of the memory cell that results from leakage currents. The proposed design is insensitive to temperature variations. A 1-Kb DRAM using our design is fabricated by a TSMC 0.35-/spl mu/m 1P4M CMOS process. The physical measurement of the proposed design on silicon verifies the correctness of the proposed circuitry.
Keywords :
CMOS memory circuits; DRAM chips; integrated circuit design; leakage currents; 0.35 micron; 1 kbit; DRAM; TSMC 1P4M CMOS process; leakage currents; memory cell; power reduction; temperature insensitive self recharging circuit; CMOS process; Circuits; Leakage current; MOS devices; Monitoring; Power generation; Random access memory; Silicon; Temperature; Threshold voltage; Adaptive self-recharging circuitry; DRAM; self-recharge;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2004.842878
