Title :
A cost effective D-TV system chip set
Author :
Mihara, Yoshikazu ; Hirase, Katsunori ; Tanaka, Minoru
Author_Institution :
Hypermedia Res. Center, Sanyo Inc., Japan
fDate :
8/1/1999 12:00:00 AM
Abstract :
This paper proposes a cost-effective D-TV system chip set. The video decoder is applicable up to MP@HL, and a new down-decode technique is adopted to reduce the amount of required video frame memory down to a quarter
Keywords :
decoding; digital signal processing chips; digital video broadcasting; high definition television; television receivers; video signal processing; HDTV receiver; MP@HL; cost effective D-TV system chip set; down-decode technique; required video frame memory; video decoder; Costs; Decoding; Demodulation; Displays; Error correction; Filters; Read-write memory; Streaming media; TV; Transforms;
Journal_Title :
Consumer Electronics, IEEE Transactions on
