Title :
Low-Frequency Noise in SONOS-TFT With a Trigate Nanowire Structure Under Program/Erase Operation
Author :
Hu, Hsin-Hui ; Jheng, Yong-Ren ; Wu, Yung-Chun ; Hung, Min-Feng ; Huang, Guo-Wei
Author_Institution :
Dept. of Electron. Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan
Abstract :
This letter investigates low-frequency noise (LFN) in polycrystalline silicon thin-film transistor (TFT) nonvolatile memory (NVM) under Fowler-Nordheim tunneling program/erase (P/E) operation. The NVM utilizes a silicon-oxide-nitride-oxide-silicon (SONOS)-type structure with a trigate multiple nanowire (NW) channels. The difference in the flicker noise (1/f) level between a multiple-channel NW device and a standard single-channel device became smaller after P/E cycling. The observation can be explained by the quantity of grain-boundary traps introduced by higher electric field at the NW corner during the P/E cycle, subsequently increasing the LFN level in the multiple NW SONOS-TFT.
Keywords :
1/f noise; electric field effects; elemental semiconductors; flicker noise; nanowires; random-access storage; semiconductor device noise; silicon; thin film transistors; tunnelling; 1/f noise; Fowler-Nordheim tunneling P-E operation; Fowler-Nordheim tunneling program-erase operation; P-E cycling; SONOS-TFT; Si; electric field; flicker noise; grain-boundary trap quantity; low-frequency noise; nonvolatile memory; polycrystalline TFT; polycrystalline silicon thin-film transistor; standard single-channel device; trigate multiple NW channel; trigate multiple nanowire channel; Logic gates; Low-frequency noise; Nonvolatile memory; Silicon; Transistors; Low-frequency noise (LFN); nanowire (NW); polycrystalline silicon thin-film transistors (poly-Si TFTs); silicon–oxide–nitride–oxide–silicon (SONOS);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2012.2204430
