Title :
SMART-II: a three-dimensional CAD model for submicrometer MOSFET´s
Author :
Odanaka, Shinji ; Hiroki, Akira ; Ohe, Kikuyo ; Moriyama, Kaori ; Umimoto, Hiroyuki
Author_Institution :
Matsushita Electr. Ind. Co. Ltd., Osaka, Japan
fDate :
5/1/1991 12:00:00 AM
Abstract :
The authors describe a three-dimensional CAD model for submicrometer MOSFETs. The model has been implemented in a three-dimensional process/device integrated simulator, SMART-II, using a supercomputer. The MOS device model for hot electron transport is based on a modified current relation including an electron temperature effect in an inhomogeneous field. The need for an improved mobility model in an inversion layer and an impact ionization model using the recent experimental data for the mean free path is discussed with emphasis on the numerical simulation for I/V characteristics of small-geometry MOSFETs from the threshold regime to the avalanche regime. It is found that this approach is effective in realizing a three-dimensional CAD model for 0.5-μm MOSFETs. An application of the model reveals a three-dimensional effect of avalanche breakdown behavior in small-geometry MOSFETs
Keywords :
MOS integrated circuits; carrier mobility; circuit CAD; circuit analysis computing; hot carriers; impact ionisation; insulated gate field effect transistors; semiconductor device models; 0.5 micron; 3D simulator; I/V characteristics; MOS device model; SMART-II; avalanche breakdown behavior; avalanche regime; electron temperature effect; hot electron transport; impact ionization model; inhomogeneous field; inversion layer; mean free path; mobility model; modified current relation; numerical simulation; process/device integrated simulator; small-geometry MOSFETs; submicron MOSFET; supercomputer; three-dimensional CAD model; threshold regime; Computational modeling; Electrons; Impact ionization; MOS devices; MOSFET circuits; Numerical simulation; Poisson equations; Silicon devices; Supercomputers; Temperature;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on