DocumentCode :
1250302
Title :
Accelerating relaxation algorithms for circuit simulation using waveform-Newton and step-size refinement
Author :
Saleh, Resve A. ; White, Jacob K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Univ., Urbana, IL, USA
Volume :
9
Issue :
9
fYear :
1990
fDate :
9/1/1990 12:00:00 AM
Firstpage :
951
Lastpage :
958
Abstract :
A new relaxation algorithm for circuit simulation that combines the advantages of iterated timing analysis (ITA) and waveform relaxation (WR) is described. The method is based on using an iterative stepsize refinement strategy with a waveform-relaxation-newton (WRN) algorithm. All three relaxation techniques, ITA, WR, and WRN, are compared, and experimental results that indicate the strengths and weaknesses of the methods are presented. In addition, a new convergence proof for the waveform-Newton (WN) method for systems with nonlinear capacitors is provided. Finally, it is shown that the step-refined WRN algorithm can be implemented on a parallel processor in such a way that different subsystems can be processed in parallel and the solution at different timepoints of the same subsystem can also be computed in parallel
Keywords :
circuit CAD; digital simulation; parallel algorithms; relaxation theory; WRN algorithm; circuit simulation; convergence proof; iterated timing analysis; nonlinear capacitors; parallel processor; relaxation algorithms; step-size refinement; waveform relaxation; waveform-relaxation-newton; Acceleration; Algorithm design and analysis; Analytical models; Circuit simulation; Differential equations; Digital circuits; Iterative algorithms; Jacobian matrices; Timing; Transient analysis;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.59071
Filename :
59071
Link To Document :
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