DocumentCode :
1250456
Title :
Influence of MOSFET I-V characteristics on switching delay time of CMOS inverters after hot-carriers stress
Author :
Wang, Qin ; Krautschneider, Wolfgang H. ; Weber, Werner ; Schmitt-Landsiedel, Doris
Author_Institution :
Siemens AG, Munich, Germany
Volume :
12
Issue :
5
fYear :
1991
fDate :
5/1/1991 12:00:00 AM
Firstpage :
238
Lastpage :
240
Abstract :
The relationship between hot-carrier degradation in MOSFETs and CMOS inverters is studied. It is found that the device degradation characterized as the widely used bias points correlates poorly with the inverter degradation. The use of new bias points that are more meaningful for circuit performance is proposed. A simple equation for calculating the degradation of the propagation delay is developed.<>
Keywords :
CMOS integrated circuits; insulated gate field effect transistors; integrated logic circuits; logic gates; semiconductor device models; CMOS inverters; I-V characteristics; MOSFETs; bias points; circuit performance; device degradation; hot-carrier degradation; hot-carriers stress; inverter degradation; propagation delay; switching delay time; Degradation; Delay effects; Electrons; Hot carriers; Interface states; MOSFET circuits; Propagation delay; Pulse inverters; Pulse measurements; Stress measurement;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.79569
Filename :
79569
Link To Document :
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