DocumentCode :
1250470
Title :
Effect of back-gate bias on tunneling leakage in a gated P/sup +/-n diode
Author :
Chen, Ming-Jer
Author_Institution :
Inst. of Electron., Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan
Volume :
12
Issue :
5
fYear :
1991
fDate :
5/1/1991 12:00:00 AM
Firstpage :
249
Lastpage :
251
Abstract :
The author describes observations of a thin-oxide gate-controlled p/sup +/-n diode in which tunneling leakage current characteristics were seen to have both dependent and independent components due to the substrate bias voltage. Previously proposed models for leakage current do not account for this observation. It is argued that this observation can be reasonably explained by the nature of the modulation of the surface space-charge region over the heavily doped p/sup +/ region as well as over the n-type substrate.<>
Keywords :
leakage currents; metal-insulator-semiconductor devices; semiconductor device models; semiconductor diodes; tunnelling; MOSFET; back-gate bias; dependent components; gated P/sup +/-n diode; heavily doped p/sup +/ region; independent components; models; modulation; n-type substrate; substrate bias voltage; surface space-charge region; thin-oxide gate-controlled p/sup +/-n diode; tunneling leakage current characteristics; Approximation methods; CMOS process; Current measurement; Diodes; Doping; Leakage current; MOSFET circuits; Testing; Tunneling; Voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.79572
Filename :
79572
Link To Document :
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