Circuit design and performance analysis of carrier recovery loop for digital DBS system in the presence of phase noise

The theoretical analysis of a digital satellite broadcasting system in the presence of phase noise is performed. An effective technique to design the carrier recovery circuit is also presented based on the analyzed loop parameters, such as degradation loss due to phase noise, average time to cycle slip, and carrier signal acquisition time. It is possible to design a system providing the optimal service and satisfying service requirements for a digital satellite broadcasting system. In this paper, the carrier recovery loop that provides optimal performance in the presence of phase noise exhibits the parameters of 0.707 for damping factor and 40 kHz for noise bandwidth. The designed phase-locked loop indicates a performance of 0.26 dB for impairment due to phase noise at 10^-3 BER, 3.88×10⁶ hours for average time to cycle slip, and 34 msec for carrier signal acquisition time. The carrier acquisition time of the designed carrier recovery circuit is in accordance with the analyzed result