Title :
Built-in self-test of a CMOS ALU
Author :
Cerny, E. ; Aboulhamid, M. ; Bois, G. ; Cloutier, J.
Author_Institution :
Dept. of Comput. Sci., Montreal Univ., Que., Canada
Abstract :
A technique is proposed for implementing BIST (built-in self-test) in a CMOS arithmetic and logic unit (ALU). The approach covers single stuck-open faults and all functional faults that do not induce memory effects. The specific fault set covered by the test includes: (1) all single stuck-open faults on n and p transistors anywhere in the ALU (F1 faults); and (2) all functional faults that affect any single-bit slice of the (F2 faults), a functional fault being any fault that changes one combinational function into another. Functional faults in multiple slices are also detectable, as long as they do not generate identical responses in all even-numbered or odd-numbered ALU slices. With common techniques for test vector generation and response-verification, this BIST implementation provides higher fault coverage with only a small increase in surface area.<>
Keywords :
CMOS integrated circuits; automatic testing; integrated circuit testing; integrated logic circuits; logic testing; BIST; CMOS ALU; built-in self-test; combinational function; fault coverage; fault set; functional faults; response-verification; single stuck-open faults; test vector generation; Automatic testing; Built-in self-test; CMOS logic circuits; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Logic arrays; Logic testing; Registers;
Journal_Title :
Design & Test of Computers, IEEE
