DocumentCode :
1254637
Title :
A fast three-dimensional process simulator OPUS/3D with access to two-dimensional simulation results
Author :
Ushio, Shintaro ; Nishi, Kenji ; Kuroda, Shigeki ; Kai, Kazuhiko ; Ueda, Jen
Author_Institution :
Oki Electr. Ind. Co. Ltd., Tokyo, Japan
Volume :
9
Issue :
7
fYear :
1990
fDate :
7/1/1990 12:00:00 AM
Firstpage :
745
Lastpage :
751
Abstract :
A three-dimensional (3-D) process simulator, OPUS/3D, has been developed. It has access to two-dimensional (2-D) process simulation results. Impurity profiles and structural data simulated rigidly in 2-D space are expanded to 3-D space at an arbitrary stage of the simulation processes. 3-D simulation follows until the end of the process. The access to 2-D simulation results enables OPUS/3D to handle curved boundaries as seen in field oxides. OPUS/3D has three different methods for expanding 2-D results. Errors due to these expansions are discussed. OPUS/3D was applied to 3-D simulations of MOS devices at the corner edge of the active region and in the channel region near the source/drain. Computation time was drastically reduced by replacing part of the 3-D simulations by 2-D simulations. Some 3-D effects are confirmed by OPUS/3D
Keywords :
MOS integrated circuits; VLSI; digital simulation; integrated circuit technology; MOS devices; OPUS/3D; active region; channel region; curved boundaries; field oxides; impurity profiles; structural data; three-dimensional process simulator; two-dimensional simulation results; Computational modeling; Electric variables; Fabrication; Impurities; MOS devices; Numerical simulation; Silicon; Simulated annealing; Two dimensional displays; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.55211
Filename :
55211
Link To Document :
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