DocumentCode
1255086
Title
In situ calibration of stress chips
Author
Bastawros, Adel F. ; Voloshin, Arkady S.
Author_Institution
Bethlehem Steel Corp., PA, USA
Volume
13
Issue
4
fYear
1990
fDate
12/1/1990 12:00:00 AM
Firstpage
888
Lastpage
892
Abstract
A special test chip having several silicon diffused piezoresistive strain gauges is described that was used to demonstrate an in situ calibration procedure for the gauges. It is based on the use of a high-sensitivity strain measuring technique called Moire interferometry to monitor mechanical strains at the location where the gauges are, thus providing a direct correlation between measured resistance changes of the gauges and actual strains. Many of the limitations and drawbacks of previous calibration techniques have been eliminated by this approach which is direct, simple, and reliable. It is applicable to new as well as existing stress chips
Keywords
calibration; moire fringes; monolithic integrated circuits; packaging; strain gauges; strain measurement; stress measurement; Moire interferometry; Si diffused piezoresistive strain gauges; calibration of stress chips; calibration techniques; high-sensitivity strain measuring technique; in situ calibration procedure; measured resistance changes; mechanical strains; packaged IC stresses; test chip; Calibration; Capacitive sensors; Electrical resistance measurement; Mechanical variables measurement; Piezoresistance; Semiconductor device measurement; Silicon; Strain measurement; Stress; Testing;
fLanguage
English
Journal_Title
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher
ieee
ISSN
0148-6411
Type
jour
DOI
10.1109/33.62535
Filename
62535
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