Title :
Self-test: the solution to the VLSI test problem?
Author :
Totton, K. ; Shaw, S.
Author_Institution :
British Telecom Res. Labs., Ipswich, UK
Abstract :
Built-in self-test (BIST) is emerging as an important option for testing VLSI application-specific integrated circuits (ASICs). The advantages of BIST are reviewed in relation to the particular test requirements imposed by ASICs. A suite of programs are described that facilitate the incorporation of BIST into ASIC designs. The programs comprise a high-level planning tool, operating from functional descriptions of the circuit. A set of programs is also described that enables the evaluation of the fault coverage achieved when circuits are tested using pseudo-random patterns, and also aid the placement of additional test hardware to improve the level of fault coverage.
Keywords :
VLSI; automatic testing; integrated circuit testing; VLSI test problem; application-specific integrated circuits; fault coverage; high-level planning tool; pseudorandom patterns; self testing; test hardware;
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E