DocumentCode :
1255775
Title :
Test research in Japan
Author :
Fujiwara, Hideo ; Takamatsu, Yuzo ; Nanya, Takashi ; Yamada, Teruhiko ; Tamamoto, Hideo ; FURUYA, KIYOSHI
Author_Institution :
Dept. of Electron. & Commun., Meiji Univ., Japan
Volume :
5
Issue :
5
fYear :
1988
Firstpage :
60
Lastpage :
79
Abstract :
Surveys recent research activities in test technology for computers, focusing on the results of university researchers. They cover test-pattern generation, fault simulation, design for testability, built-in self-test, and self-checking.<>
Keywords :
automatic testing; computer testing; fault tolerant computing; Japan; built-in self-test; computers; design for testability; fault simulation; research activities; self-checking; test technology; test-pattern generation; university researchers; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Design for testability; Electrical fault detection; Fault detection; Fault tolerance; Logic functions; Logic testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.7982
Filename :
7982
Link To Document :
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