Design and Implementation of Dynamic Thermal-Adaptive Routing Strategy for Networks-on-Chip

Technology scaling is leading to extreme thermal challenges that make worst-case cooling system design unfavourable. On the other hand, on-chip communication, in terms of Network-on-Chip (NoC) workload, is expected to dominate Systems-on-Chip as a major heat source. In this paper a Runtime Thermal Management (RTM) design implementation for NoCs is proposed. Dynamic Programming Network (DPN) is introduced to implement the adaptive routing control logic and Ring Oscillators (ROs) are used for temperature sensing. Various challenges associated with DPN convergence and sensor accuracy and precision, such as isolating the IR drops and intra-chip process variations, are addressed. An FPGA implementation of the proposed strategy demonstrates promising results in terms of both thermal regulation and functionality with a variety of traffics. In terms of functionality, the proposed scheme is shown to be highly flexible in manoeuvring the packets away from hot regions. This results in up to 16% reduction in the maximum chip temperature and lowers chip thermal gradient by up to 51% compared with performance-driven routing. Moreover, the proposed scheme results in significantly slower chip heating which is reflected as up to 100% higher performance when the chip works under a thermal limit. These results imply that the proposed technique would improve thermal reliability and performance for future many-core VLSI systems.