A VLSI CMOS delay oriented waveform converter for polyphase frequency synthesizer

Author

Spataro, Anne ; Deval, Yann ; Bégueret, Jean-Baptiste ; Fouillat, Pascal ; Belot, Didier

Author_Institution

LXL Microelectron. Lab., Bordeaux I Univ., France

Volume

37

Issue

3

fYear

2002

fDate

3/1/2002 12:00:00 AM

Firstpage

336

Lastpage

341

Abstract

In this paper, we present a waveform converter implemented on a 0.25-μm CMOS technology using a dedicated design methodology (Delay Oriented Design). The circuit converts a square wave signal in both in-phase and quadrature-phase sinusoidal differential outputs. It also multiplies the frequency by seven. The output frequency range of this converter extends from 1.05 GHz up to 2.17 GHz. This converter is dedicated for the design of a third-generation mobile phone synthesizer using a double-loop architecture. For an output frequency of 2 GHz, the measured phase noise at 10-kHz offset from the carrier is -97 dBc/Hz. The circuit consumes 50 mW from a 2.5-V supply

Keywords

CMOS integrated circuits; VLSI; convertors; delay lock loops; frequency synthesizers; integrated circuit design; integrated circuit noise; mobile radio; phase noise; 0.25 micron; 1.05 to 2.17 GHz; 2.5 V; 50 mW; VLSI CMOS waveform converter; delay oriented design; double-loop architecture; phase noise; polyphase frequency synthesizer; third-generation mobile phone; CMOS technology; Circuits; Design methodology; Frequency conversion; Frequency measurement; Mobile handsets; Noise measurement; Propagation delay; Synthesizers; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.987085

Filename

987085