Title :
A 99-mm2 0.7-W single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder system
Author :
Kumaki, Satoshi ; Takata, Hidehiro ; Ajioka, Yoshihide ; Ooishi, Tsukasa ; Ishihara, Kazuya ; Hanami, Atsuo ; Tsuji, Takaharu ; Watanabe, Tetsuya ; Morishima, Chikayoshi ; Yoshizawa, Tomoaki ; Sato, Hidenori ; Hattori, Shin-ichi ; Koshio, Atsushi ; Tsukam
Author_Institution :
Syst. LSI Dev. Center, Mitsubishi Electr. Corp., Hyogo, Japan
fDate :
3/1/2002 12:00:00 AM
Abstract :
A scalable single-chip 422P@ML MPEG-2 video, audio, and system encoder LSI for portable 422P@HL system is described. The encoder LSI is implemented using 0.13-μm embedded DRAM technology. It integrates 3-M logic gates and 64-Mb DRAM in an area of 99-mm2. The power consumption is suppressed to 0.7 W by adopting a low-power DRAM core. It performs real-time 422P@ML video encoding, audio encoding, and system encoding with no external DRAM. Furthermore, the encoder LSI realizes a 422P@HL video encoder with multichip configuration, due to its scalable architecture. This results in a PC-card size 422P@HL encoder for portable HDTV codec system
Keywords :
DRAM chips; audio coding; embedded systems; high definition television; large scale integration; low-power electronics; video codecs; 0.7 W; 64 Mbit; MPEG-2; PC-card size; audio encoder; dual communication ports; embedded DRAM technology; low power consumption; low-power DRAM core; multichip configuration; optimal performance assignment; parallel encoding scheme; picture resolution; portable HDTV codec; portable system; real-time encoding; scalable single-chip encoder LSI; system encoder; video encoder; Codecs; Encoding; Energy consumption; HDTV; Large scale integration; Logic gates; Random access memory; Real time systems; Ultra large scale integration; Video coding;
Journal_Title :
Solid-State Circuits, IEEE Journal of
