DocumentCode
1256160
Title
Spurious effects induced by current switching in power strips of wafer package
Author
Chilo, J. ; Fort, P.
Author_Institution
ENSERG-LEMO, Grenoble, France
Volume
13
Issue
4
fYear
1990
fDate
12/1/1990 12:00:00 AM
Firstpage
1110
Lastpage
1114
Abstract
Spurious effects due to current switching in power lines on silicon wafer packages (monolithic or hybrid) are analyzed in the time domain. Theoretical results lead to simple relations allowing easy predictions of the dynamic voltage drop on a power line and of the spurious voltages on signal lines induced by crosstalk with power lines. Experimental measurements on typical devices are presented to validate these formulas
Keywords
electric potential; elemental semiconductors; monolithic integrated circuits; packaging; power integrated circuits; silicon; time-domain analysis; Si; crosstalk; current switching; dynamic voltage drop; hybrid Si wafer packages; monolithic Si wafer packages; power lines; power strips; signal lines; spurious voltages; time domain; wafer package; Clocks; Crosstalk; Frequency; Integrated circuit interconnections; Packaging; Power transmission lines; Silicon; Strips; Time domain analysis; Voltage;
fLanguage
English
Journal_Title
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher
ieee
ISSN
0148-6411
Type
jour
DOI
10.1109/33.62559
Filename
62559
Link To Document