Writing Parallel Embedded Software Effectively

Writing parallel software effectively for embedded systems is not an easy task. We believe a new approach is needed to maximize the performance speed-up. Therefore we propose a layered top-down model for parallel embedded software, based on Our Pattern Language for High-Performance Computing. Several case studies were developed to demonstrate the strength of the model. First, a Fast Fourier Transformation algorithm was parallelized using the top-down model. A speed-up was achieved close to the theoretical maximum. Next, a telecommunication system was migrated from a naive symmetric multiprocessing setup to an asymmetric multiprocessing set-up. Finally, an algorithm that searches for sequences in a list of arcs and lines was implemented in two different ways. The strengths and weaknesses of both parallel implementations are explained.