A Spread Spectrum Clock Generator for DisplayPort Main Link

Author

Lee, Won-Young ; Kim, Lee-Sup

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea

Volume

58

Issue

6

fYear

2011

fDate

6/1/2011 12:00:00 AM

Firstpage

361

Lastpage

365

Abstract

This brief presents a spread spectrum clock generator (SSCG) with a process variation compensator for DisplayPort main link. The process variation compensator reduces the error of spread ratio and guarantees reliable operation of an SSCG. The test chip has been implemented in 0.18-μm complementary metal-oxide-semiconductor process. The SSCG supports 10-phase 270- and 162-MHz clocks. The phase noise of an output clock at 270 MHz without spread spectrum clocking is -97.7 and -120.4 dBc/Hz at 1- and 10-MHz offset, respectively. The peak reduction is 8.75 dBm, and the spread ratio of 5000 ppm is achieved with a process variation compensator.

Keywords

CMOS digital integrated circuits; clocks; computer displays; driver circuits; peripheral interfaces; DisplayPort main link; complementary metal oxide semiconductor process; process variation compensator; size 0.18 mum; spread spectrum clock generator; Clocks; Electromagnetic interference; Frequency control; Frequency modulation; Generators; Voltage-controlled oscillators; Clock generation; DisplayPort; process variation; spread spectrum;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2011.2149670

Filename

5928393