DocumentCode
1256344
Title
CMOS RF Low-Noise Amplifier Design for Variability and Reliability
Author
Liu, Yidong ; Yuan, Jiann-shiun
Author_Institution
Univ. of Central Florida, Orlando, FL, USA
Volume
11
Issue
3
fYear
2011
Firstpage
450
Lastpage
457
Abstract
An adaptive substrate (body) bias design for variability and reliability for a CMOS low-noise amplifier (LNA) is analyzed. The proposed body biasing scheme provides a radio-frequency circuit that is resilient to process variations and device reliability. Small-signal models including substrate bias effect are developed for noise figure and small-signal power gain sensitivity. The cascode LNA operating at 24 GHz with the adaptive substrate bias scheme is compared with the LNA without body bias using the PTM 65-nm technology. The modeling and simulation results show that the adaptive substrate bias reduces the sensitivity of noise figure and minimum noise figure subject to process variations and device aging such as threshold voltage shift and electron mobility degradation.
Keywords
CMOS integrated circuits; MMIC amplifiers; field effect MMIC; integrated circuit reliability; low noise amplifiers; CMOS RF low-noise amplifier design; adaptive substrate bias design; device aging; device reliability; electron mobility degradation; frequency 24 GHz; noise figure; process variations; size 65 nm; small-signal models; small-signal power gain sensitivity; threshold voltage shift; Integrated circuit reliability; Logic gates; Noise; Substrates; Threshold voltage; Transistors; Adaptive body bias; Monte Carlo simulation; design for reliability (DFR); low-noise amplifier (LNA); noise figure; radio frequency (RF); small-signal model; variability;
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2011.2160350
Filename
5928400
Link To Document