Impact of two-step-recessed gate structure on RF performance of InP-based HEMTs

Author

Suemitsu, T. ; Enoki, T. ; Yokoyama, H. ; Umeda, Y. ; Ishii, Y.

Author_Institution

NTT Syst. Electron. Labs., Kanagawa, Japan

Volume

34

Issue

2

fYear

1998

fDate

1/22/1998 12:00:00 AM

Firstpage

220

Lastpage

222

Abstract

The RF performance of InP-based lattice-matched high electron mobility transistors (HEMTs) is improved by using a two-step-recess process. 0.07 μm gate HEMTs show a cutoff frequency (f_τ) of 300 GHz, a value previously achievable only with a gate length of 0.05 μm in the conventional gate structure, and a maximum frequency of oscillation f_max of 400 GHz. The high f _τ indicates that the effective gate length is successfully suppressed by the two-step-recessed gate structure. Moreover, owing to the selective etching property, this gate recess process provides high uniformity of the threshold voltage and the cutoff frequency of the HEMTs on a 3-in wafer

Keywords

III-V semiconductors; etching; high electron mobility transistors; indium compounds; microwave field effect transistors; 0.07 micron; 3 in; 300 GHz; 400 GHz; HEMTs; InP; RF performance; cutoff frequency; frequency of oscillation; gate length; lattice-matched high electron mobility transistors; selective etching property; threshold voltage; two-step-recess process; two-step-recessed gate structure;

fLanguage

English

Journal_Title

Electronics Letters

Publisher

iet

ISSN

0013-5194

Type

jour

DOI

10.1049/el:19980166

Filename

653213