• DocumentCode
    1256521
  • Title

    Impact of Cell Shape on Random Telegraph Noise in Decananometer Flash Memories

  • Author

    Amoroso, Salvatore Maria ; Ghetti, Andrea ; Brown, Andrew R. ; Mauri, Aurelio ; Compagnoni, Christian Monzio ; Asenov, Asen

  • Author_Institution
    Dept. of Electron., Univ. of Glasgow, Glasgow, UK
  • Volume
    59
  • Issue
    10
  • fYear
    2012
  • Firstpage
    2774
  • Lastpage
    2779
  • Abstract
    This paper presents a comprehensive numerical study of the impact of cell shape on random telegraph noise (RTN) in nanoscale Flash memory devices. The statistical dispersion of the RTN fluctuation amplitude is computed using both classical and quantum-corrected 3-D TCAD simulations of devices featuring three different active-area shapes (planar, rounded edges, and full rounded), with self-aligned or surrounding floating gate. For both the floating-gate geometries, results show that RTN immunity is enhanced by increasing the rounding of the active-area edges in the width direction, due to a more uniform source-to-drain conduction during read. For this analysis, the importance of quantum-mechanical corrections for the correct evaluation of the RTN distribution of sharp-edge devices is highlighted. Finally, the reduction of RTN by cell shape engineering is shown to be anticorrelated with the reduction of cell threshold-voltage variability.
  • Keywords
    flash memories; numerical analysis; technology CAD (electronics); READ; RTN fluctuation amplitude; RTN immunity; active-area edges; active-area shapes; cell shape engineering; cell threshold-voltage variability reduction; classical 3D TCAD simulations; decananometer flash memories; floating-gate geometries; full rounded shapes; nanoscale flash memory devices; numerical study; planar shapes; quantum-corrected 3D TCAD simulations; quantum-mechanical corrections; random telegraph noise; rounded edges shapes; self-aligned floating gate; sharp-edge devices; source-to-drain conduction; statistical dispersion; width direction; Doping; Geometry; Logic gates; Noise; Proximity effects; Semiconductor process modeling; Shape; Flash memory devices; random telegraph noise (RTN); semiconductor device modeling; semiconductor device reliability; variability;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2012.2208224
  • Filename
    6256711