DocumentCode
1256628
Title
Device Design Engineering for Optimum Analog/RF Performance of Nanoscale DG MOSFETs
Author
Sharma, Rupendra Kumar ; Bucher, Matthias
Author_Institution
Dept. of Electron. & Comput. Eng., Tech. Univ. of Crete, Chania, Greece
Volume
11
Issue
5
fYear
2012
Firstpage
992
Lastpage
998
Abstract
Analog/RF performance of double-gate MOSFETs in the sub-20-nm regime is investigated using ATLAS device simulator. It is shown that graded channel dual material double gate (GCDMDG) achieves higher drain current, peak transconductance, and higher values of cutoff frequency at lower drain currents. This novel architecture also provides better intrinsic gain for an amplifier. A new analog/RF figure of merit, gain transconductance frequency product (GTFP) is proposed that includes both the switching speed and intrinsic gain of the device and is very useful for circuit design. The peak GTFP is observed at the higher end of moderate inversion, slightly above threshold. The GCDMDG device outperforms in terms of GTFP and is more favorable for shorter channel length devices.
Keywords
MOSFET; design engineering; nanofabrication; ATLAS device simulator; GCDMDG; cutoff frequency; device design engineering; double gate MOSFET; drain current; gain transconductance frequency product; graded channel dual material double gate; nanoscale DG MOSFET; optimum analog/RF performance; peak transconductance; Capacitance; Electric fields; Logic gates; MOSFETs; Materials; Performance evaluation; Transconductance; ATLAS device simulator; Analog circuit design; double-gate MOSFET; dual material double gate (DMDG); graded channel (GC);
fLanguage
English
Journal_Title
Nanotechnology, IEEE Transactions on
Publisher
ieee
ISSN
1536-125X
Type
jour
DOI
10.1109/TNANO.2012.2204439
Filename
6256737
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