DocumentCode
1256875
Title
Subnanosecond 32 bit multiplier using negative differential resistance devices
Author
Mohan, Swati ; Mazumder, Prasenjit ; Haddad, G.I.
Author_Institution
Dept. of Electr. Eng. Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Volume
27
Issue
21
fYear
1991
Firstpage
1929
Lastpage
1931
Abstract
Negative differential resistance devices such as resonant tunnelling transistors have been used to design bistable logic circuits. A subnanosecond pipelined multiplier has been designed taking advantage of the fact that the bistable logic circuits simultaneously provide both the logic and the latching functions without any overhead.
Keywords
bipolar integrated circuits; field effect integrated circuits; integrated logic circuits; multiplying circuits; negative resistance; pipeline processing; 32 bit; 840 ps; bistable logic circuits; latching functions; negative differential resistance devices; resonant tunnelling transistors; subnanosecond pipelined multiplier;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19911198
Filename
98854
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