DocumentCode
1257582
Title
Physically-Aware Analysis of Systematic Defects in Integrated Circuits
Author
Wing Chiu Tam ; Blanton, R.D.
Volume
29
Issue
5
fYear
2012
Firstpage
81
Lastpage
93
Abstract
Design-induced systematic defects are serious threats to the semiconductor industry. This paper develops novel techniques to identify and prevent such defects, which facilitate to evaluate the effectiveness of DFM rules and improve the manufacturing process and design for yield enhancement.
Keywords
design for manufacture; integrated circuit design; integrated circuit yield; semiconductor industry; DFM rules; design-for-manufacturability; design-induced systematic defects; integrated circuits; manufacturing process; physically-aware analysis; semiconductor industry; serious threats; yield enhancement; Fault diagnosis; Feature extraction; Integrated circuit modeling; Systematics; Testing; DFM rule evaluation; Systematic defects; layout analysis; volume diagnosis; yield learning;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2012.2211093
Filename
6257512
Link To Document