DocumentCode :
1257653
Title :
Statistical Simulation of Static Noise Margin Variability in Static Random Access Memory
Author :
Li, Yiming ; Cheng, Hui-Wen ; Han, Ming-Hung
Volume :
23
Issue :
4
fYear :
2010
Firstpage :
509
Lastpage :
516
Abstract :
In this paper, we examine the impact of random-dopant-fluctuation (RDF), process-variation-effect (PVE), and workfunction-fluctuation (WKF), on 16-nm-gate metal-oxide-semiconductor field-effect-transistor (MOSFET) static random access memory (SRAM) cells. For planar MOSFETs with a threshold voltage of 140 mV, the nominal static noise margin (SNM) of six-transistor (6T)-SRAM with unitary cell ratio (CR) is only 20 mV; and the normalized SNM fluctuations (SNM) induced by RDF, PVE, and WKF are 80%, 31%, and 48%, respectively, which may damage SRAM´s operation. Two improvement approaches are further implemented; first, eight-transistor (8T)-SRAM and 6T-SRAM with increased CR are examined. Compared with the conventional 6T-SRAM, under the same , the SNM of 8T-SRAM is enlarged to 233 mV and the corresponding RDF, PVE, and WKF-induced SNM are reduced to 9.5%, 6.4%, and 7%, respectively, at a cost of 30% extra chip area. Without increasing chip area, device with raised , doping profile engineering and using silicon-on-insulator fin-type field-effect transistors (SOI FinFETs) are further advanced. The 6T SOI FinFETs SRAM exhibits the smallest , with merely 5.3%, 1.2%, and 2.3%, resulting from RDF, PVE, and WKF, respectively, where the value of SNM is equal to 125 mV.
Keywords :
MOSFET circuits; SRAM chips; doping profiles; integrated circuit noise; semiconductor doping; silicon-on-insulator; statistical analysis; SRAM; doping profile; fin type field effect transistors; metal oxide semiconductor field effect transistor; process variation effect; random dopant fluctuation; silicon-on-insulator; size 16 nm; static noise margin variability; static random access memory; workfunction fluctuation; Chromium; Costs; FinFETs; Fluctuations; MOSFET circuits; MOSFETs; Random access memory; Resource description framework; SRAM chips; Semiconductor process modeling; Signal to noise ratio; Silicon on insulator technology; Threshold voltage; Ultra large scale integration; Eight-transistor (8T); electrical characteristic; fin-type field-effect transistors (FinFET); fluctuation; metal-oxide-semiconductor field-effect-transistor (MOSFET); planar; process variation; random dopant; silicon-on-insulator (SOI); six-transistor (6T); static noise margin (SNM); static random access memory (SRAM); workfunction fluctuation;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/TSM.2010.2056710
Filename :
5524022
Link To Document :
بازگشت