Efficient input-reordering algorithms for fast DCT

The non-in-place input mapping and the subsequent bit-reversal stage for the computation of the fast discrete cosine transform (DCT) are studied. The redundancies associated with those algorithms are identified and three fast input reordering algorithms are proposed. These new algorithms result in fewer data transfers by a factor of N, reduced storage requirements by a factor of N/2 and an average speed increase of 37%.