Title :
A novel 3-D BiCMOS technology using selective epitaxy growth (SEG) and lateral solid phase epitaxial (LSPE)
Author :
Liu, Haitao ; Kumar, Mahender ; Sin, Johnny K O
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Clear Water Bay, China
fDate :
3/1/2002 12:00:00 AM
Abstract :
In this paper, a novel three-dimensional (3-D) BiCMOS technology is proposed and demonstrated. In this technology, the NMOS transistor is fabricated on the bulk substrate (bottom layer) and the PMOS transistor is fabricated on the single-crystal top layer obtained using the selective epitaxy growth (SEG) and lateral solid phase epitaxy (LSPE). In addition, the BJT is fabricated in the SEG region. The mobility of the PMOS transistors fabricated on the top layer is only approximately 5% lower than that of the PMOS fabricated on SOI, and the BJTs also have high performance with a peak f/sub T/ of 17 GHz and f/sub max/ of 14 GHz at V/sub ce/=3 V. This 3-D BiCMOS technology is very promising for low power, high speed, and high frequency integrated circuit applications.
Keywords :
BiCMOS integrated circuits; MMIC; UHF integrated circuits; ULSI; VLSI; high-speed integrated circuits; integrated circuit technology; low-power electronics; semiconductor growth; solid phase epitaxial growth; vapour phase epitaxial growth; 14 GHz; 17 GHz; 3 V; 3D BiCMOS technology; BJT; HF integrated circuit applications; NMOS transistor; PMOS transistor; SEG region; ULSI; VLSI; bulk substrate; high frequency IC applications; high speed IC applications; lateral SPE; lateral solid phase epitaxy; low power IC applications; mobility; selective epitaxy growth; single-crystal top layer; Application specific integrated circuits; BiCMOS integrated circuits; Epitaxial growth; Frequency; High speed integrated circuits; Integrated circuit technology; MOSFETs; Solids; Substrates; Very high speed integrated circuits;
Journal_Title :
Electron Device Letters, IEEE
