Title :
A 0.25-μm, 600-MHz, 1.5-V, fully depleted SOI CMOS 64-bit microprocessor
Author :
Park, Sung Bae ; Kim, Young Wug ; Ko, Young Gun ; Kim, Kwang II ; Kim, II Kwon ; Kang, Hee-Sung ; Yu, Jin Oh ; Suh, Kwang Pyuk
Author_Institution :
Samsung Electron. Co., Kyungki, South Korea
fDate :
11/1/1999 12:00:00 AM
Abstract :
A 0.25-μm, four-layer-metal, 1.5-V, 600-MHz, fully depleted (FD) silicon-on-insulator (SOI) CMOS 64-bit ALPHA1 microprocessor integrating 9.66 million transistors on a 209-mm2 silicon die has been developed leveraging the existing bulk design. FD-SOI technology is used because it has better immunity for dynamic leakage current than partially depleted SOI in high speed dynamic circuits without body contact. C-V characteristics of metal-oxide-silicon-oxide-silicon with and without source-drain junctions are described to explain the behavior of FD-SOI transistor. Race, speed, and dynamic stability have been simulated to reassure the circuit operation. Key process features are shallow trench isolation, 4-nm gate oxide, 30-nm co-silicide, 46-nm silicon film, and 200-nm buried oxide. The FD-SOI microprocessor runs 30% faster than that of bulk, and it passes the reliability and system test
Keywords :
CMOS digital integrated circuits; circuit stability; integrated circuit design; integrated circuit reliability; isolation technology; leakage currents; microprocessor chips; silicon-on-insulator; 0.25 micron; 1.5 V; 200 nm; 30 nm; 4 nm; 46 nm; 600 MHz; 64 bit; ALPHA1 microprocessor; C-V characteristics; Si-SiO; bulk design; circuit operation; dynamic leakage current; dynamic stability; four-layer-metal; fully depleted SOI CMOS; high speed dynamic circuits; process features; reliability; source-drain junctions; trench isolation; CMOS technology; Capacitance-voltage characteristics; Circuit simulation; Circuit stability; Circuit testing; Immune system; Leakage current; Microprocessors; Semiconductor films; Silicon on insulator technology;
Journal_Title :
Solid-State Circuits, IEEE Journal of
