Title :
A microprocessor with a 128-bit CPU, ten floating-point MAC´s, four floating-point dividers, and an MPEG-2 decoder
Author :
Suzuoki, Masakazu ; Kutaragi, Ken ; Hiroi, Toshiyuki ; Magoshi, Hidetaka ; Okamoto, Shin´ichi ; Oka, Masaaki ; Ohba, Akio ; Yamamoto, Yasuyuki ; Furuhashi, Makoto ; Tanaka, Masayoshi ; Yutaka, Teiji ; Okada, Toyoshi ; Nagamatsu, Masato ; Urakawa, Yukihiro
Author_Institution :
Sony Comput. Entertainment Inc., Tokyo, Japan
fDate :
11/1/1999 12:00:00 AM
Abstract :
A 250-MHz microprocessor intended for home computer entertainment consists of a CPU core with 128-b multimedia extensions, two single-instruction, multiple-data (SIMD) very long instruction word (VLIW) vector processors containing ten floating-point multiplier accelerators and four floating-point dividers, an MPEG-2 decoder, a ten-channel direct memory access (DMA) controller, and other peripherals with 128 b internal buses on one die. The core is a two-way superscalar MIPS-compatible microprocessor with 16-kB scratch-pad RAM. Each vector processor is a five-way SIMD-VLIW architecture, which is tightly dedicated for specific applications concerning three-dimensional geometry calculation and physical simulation. A DMA controller connects between main memory and each processor´s local memory to conceal memory access penalty. It contains 10.5 M transistors in 17×14.1 mm and dissipates 15 W at 1.8 V
Keywords :
CMOS digital integrated circuits; VLSI; computer games; computer graphic equipment; computer graphics; data compression; data flow computing; decoding; distributed memory systems; entertainment; file organisation; floating point arithmetic; home computing; image processing equipment; image texture; memory architecture; microprocessor chips; multimedia computing; parallel architectures; real-time systems; storage management; vector processor systems; video coding; 0.25 micron; 1.8 V; 128 bit; 15 W; 16 kB; 250 MHz; 3D geometry calculation; CMOS microprocessor; CPU core; DSP; MIPS-compatible microprocessor; MPEG-2 decoder; SIMD VLIW vector processors; data flow computing; direct memory access controller; five-way SIMD-VLIW architecture; floating-point MAC; floating-point dividers; floating-point multiplier accelerators; home computer entertainment applications; multimedia extensions; peripherals; physical simulation; scratch-pad RAM; single-instruction multiple-data processors; ten-channel DMA controller; two-way superscalar microprocessor; very long instruction word processors; Decoding; Geometry; Home computing; Microprocessors; Multimedia systems; Random access memory; Read-write memory; Solid modeling; VLIW; Vector processors;
Journal_Title :
Solid-State Circuits, IEEE Journal of
