Title :
A new LDD structure: total overlap with polysilicon spacer (TOPS)
Author :
Moon, J.E. ; Garfinkel, T. ; Chung, J. ; Wong, M. ; Ko, P.K. ; Hu, Chenming
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fDate :
5/1/1990 12:00:00 AM
Abstract :
The total overlap with polysilicon spacer (TOPS) structure, a fully overlapped lightly doped drain (LDD) structure, is discussed. The TOPS structure achieves full gate overlap of the lightly doped region with simple processing. TOPS devices have demonstrated superior performance and reliability compared to oxide-spacer LDD devices, with an order of magnitude advantage in current degradation under stress for the same initial current drive or 30% more drive for the same amount of degradation. TOPS devices also show a much smaller sensitivity to n/sup -/ dose variation than LDD devices. Gate-induced drain leakage is reported for the first time in fully overlapped LDD devices.<>
Keywords :
insulated gate field effect transistors; TOPS devices; current degradation; fully overlapped LDD devices; gate-induced drain leakage; n/sup -/ dose variation; polysilicon spacer; reliability; total overlap; Chemical vapor deposition; Degradation; Etching; Fabrication; Hafnium; Hot carrier effects; Moon; Reliability theory; Stress;
Journal_Title :
Electron Device Letters, IEEE
