DocumentCode
1260387
Title
Simultaneous switching ground noise calculation for packaged CMOS devices
Author
Senthinathan, R. ; Prince, J.L.
Author_Institution
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
Volume
26
Issue
11
fYear
1991
fDate
11/1/1991 12:00:00 AM
Firstpage
1724
Lastpage
1728
Abstract
Here, it is assumed that the internal switching current is small compared to the output driver switching current. In the past, it was assumed that simultaneous switching noise created by CMOS outputs was directly proportional to the number of outputs switching simultaneously. Recent studies indicate that CMOS circuits exhibit sublinear behavior (due to the negative feedback influence) of power/ground noise (or bounce) as a function of the number of outputs switching simultaneously. Detailed electrical models, equations, and a trial architecture for calculating the switching noise are included. The results are compared to SPICE simulations and conventional power/ground noise calculations. The behavior of simultaneous switching noise as a function of constant-voltage (CV) device scaling is explained for small-geometry CMOS output drivers
Keywords
CMOS integrated circuits; digital integrated circuits; CMOS outputs; SPICE simulations; calculation; device scaling; electrical models; ground bounce; internal switching current; negative feedback influence; output driver switching current; packaged CMOS devices; power/ground noise calculations; simultaneous switching ground noise; simultaneous switching noise; small-geometry CMOS output drivers; sublinear behavior; trial architecture; Circuit noise; Circuit simulation; Driver circuits; Equations; Feedback circuits; Negative feedback; Packaging; SPICE; Semiconductor device modeling; Switching circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.98995
Filename
98995
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