Software Support and Evaluation of Hardware Transactional Memory on Blue Gene/Q

Author

Wang, A. ; Gaudet, M. ; Peng Wu ; Ohmacht, M. ; Amaral, J.N. ; Barton, C. ; Silvera, R. ; Michael, M.M.

Author_Institution

IBM Canada Software Lab., Markham, ON, Canada

Volume

64

Issue

1

fYear

2015

fDate

Jan. 2015

Firstpage

233

Lastpage

246

Abstract

This paper describes an end-to-end system implementation of a transactional memory (TM) programming model on top of the hardware transactional memory (HTM) of the Blue Gene/Q machine. The TM programming model supports most C/C++ programming constructs using a best-effort HTM and the help of a complete software stack including the compiler, the kernel, and the TM runtime. An extensive evaluation of the STAMP and the RMS-TM benchmark suites on BG/Q is the first of its kind in understanding characteristics of running TM workloads on real hardware TM. The study reveals several interesting insights on the overhead and the scalability of BG/Q HTM with respect to sequential execution, coarse-grain locking, and software TM.

Keywords

benchmark testing; concurrency control; program compilers; BG/Q HTM overhead; BG/Q HTM scalability; Blue Gene/Q machine; C programming construct; C++ programming construct; HTM; RMS-TM benchmark suites; STAMP benchmark suites; TM programming model; TM runtime; TM workloads; coarse-grain locking; compilers; end-to-end system implementation; hardware transactional memory evaluation; real hardware TM; sequential execution; software TM; software stack; software support; Hardware; Instruction sets; Kernel; Programming; Registers; Runtime; Hardware transactional memory; TM; performance evaluation; runtime system;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/TC.2013.190

Filename

6601597