Title :
A generalized HSPICETM macro-model for pinned spin-dependent-tunneling devices
Author :
Das, Bodhisattva ; Black, William C.
Author_Institution :
Dept. of Electr. Eng. & Comput. Eng., Iowa State Univ., Ames, IA, USA
fDate :
9/1/1999 12:00:00 AM
Abstract :
This work presents the first generalized circuit macro-model for a pinned Spin-Dependent-Tunneling (SDT) device. The macro-model is realized as a four terminal sub-circuit which emulates SDT device behavior over a wide range of sense and word line currents. This model accurately represents the nonlinear and hysteretic nature of an SDT device and HSPICETM simulations of memory circuits using this model show expected outcomes. The model is flexible and relatively simple: ranges of the write/read currents and device resistance values are incorporated as parameterized variables and no semiconductor devices are used within the model
Keywords :
SPICE; giant magnetoresistance; magnetic heads; piecewise linear techniques; spin valves; decision circuit; device resistance values; flip flop; four terminal sub-circuit; generalized HSPICE macro-model; giant MR; hysteretic nature; magnetic RAM; mapping circuit; memory circuits; nonlinear nature; parameterized variables; piecewise linear; pinned spin-dependent-tunneling devices; sense circuit; write/read currents; Circuit simulation; Current density; Flip-flops; Magnetic devices; Magnetic hysteresis; Nonvolatile memory; Semiconductor devices; Senior members; Silicon; Voltage;
Journal_Title :
Magnetics, IEEE Transactions on
