Title :
Through-Oxide-Via-Induced Back-Gate Effect in 3-D Integrated FDSOI Devices
Author :
Trivedi, Amit Ranjan ; Mukhopadhyay, Saibal
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
This letter studies the interaction of the potential of through-oxide-via (TOV) and the electrical behavior of neighboring transistors in a 3-D stack of fully depleted silicon-on-insulator (FDSOI) devices. Using device simulation, we show that the back-gate electric field of FDSOI devices can be significantly modulated by the potential of TOVs placed in close proximity. Consequently, the change in the TOV potential results in appreciable variation in the threshold voltage and the leakage current of neighboring FDSOI devices.
Keywords :
leakage currents; silicon-on-insulator; three-dimensional integrated circuits; 3D integrated FDSOI devices; fully depleted silicon-on-insulator devices; leakage current; threshold voltage; through-oxide-via-induced back-gate effect; Electric potential; FETs; IEEE Potentials; Logic gates; Silicon; Subthreshold current; 3-D integration; Fully depleted silicon-on-insulator (FDSOI); through-oxide via (TOV);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2011.2156380