DocumentCode
1263389
Title
Error recovery in shared memory multiprocessors using private caches
Author
Wu, Kun-Lung ; Fuchs, W. Kent ; Patel, Janak H.
Author_Institution
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
Volume
1
Issue
2
fYear
1990
fDate
4/1/1990 12:00:00 AM
Firstpage
231
Lastpage
240
Abstract
The problem of recovering from processor transient faults in shared memory multiprocessor systems is examined. A user-transparent checkpointing and recovery scheme using private caches is presented. Processes can recover from errors due to faulty processors by restarting from the checkpointed computation state. Implementation techniques using checkpoint identifiers and recovery stacks are examined as a means of reducing performance degradation in processor utilization during normal execution. This cache-based checkpointing technique prevents rollback propagation, provides rapid recovery, and can be integrated into standard cache coherence protocols. An analytical model is used to estimate the relative performance of the scheme during normal execution. Extensions to take error latency into account are presented
Keywords
buffer storage; fault tolerant computing; multiprocessing systems; multiprocessor interconnection networks; system recovery; cache coherence protocols; checkpointed computation state; error latency; fault tolerance; performance degradation; private caches; processor transient faults; processor utilization; rapid recovery; recovery stacks; rollback propagation; shared memory multiprocessors; user-transparent checkpointing; Application software; Checkpointing; Concurrent computing; Degradation; Delay; Hardware; Multiprocessing systems; NASA; Parallel processing; Protocols;
fLanguage
English
Journal_Title
Parallel and Distributed Systems, IEEE Transactions on
Publisher
ieee
ISSN
1045-9219
Type
jour
DOI
10.1109/71.80134
Filename
80134
Link To Document