Title :
Miniature 3-D inductors in standard CMOS process
Author :
Tang, Chih-Chun ; Wu, Chia-Hsin ; Liu, Shen-Iuan
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
4/1/2002 12:00:00 AM
Abstract :
The structure of a miniature three-dimensional (3-D) inductor is presented in this paper. The proposed miniature 3-D inductors have been fabricated in a standard digital 0.35-μm one-poly-four-metal (1P4M) CMOS process. According to the measurement results, the self-resonance frequency fSR of the proposed miniature 3-D inductor is 34% higher than the conventional stacked inductor. Moreover, the inductor occupies only 16% of the area of the conventional planar spiral inductor with the same inductance and maximum quality factor Qmax. A 2.4-GHz CMOS low-noise amplifier (LNA), which utilized the proposed miniature 3-D inductors, has also been fabricated. By virtue of the small area of the inductor, the size and cost of the radio frequency (RF) chip can be significantly reduced
Keywords :
CMOS analogue integrated circuits; Q-factor; UHF amplifiers; UHF integrated circuits; inductance; inductors; 0.35 micron; 2.4 GHz; CMOS LNA; CMOS low-noise amplifier; digital one-poly-four-metal CMOS process; inductance; maximum quality factor; miniature 3D inductors; radio frequency chip cost reduction; self-resonance frequency; standard CMOS process; three-dimensional inductor; CMOS process; Costs; Frequency measurement; Inductance; Inductors; Low-noise amplifiers; Q factor; Radio frequency; Spirals; Strontium;
Journal_Title :
Solid-State Circuits, IEEE Journal of
