DocumentCode :
1263872
Title :
Comparison of Junctionless and Conventional Trigate Transistors With L_{g} Down to 26 nm
Author :
Rios, R. ; Cappellani, A. ; Armstrong, M. ; Budrevich, A. ; Gomez, H. ; Pai, R. ; Rahhal-orabi, N. ; Kuhn, K.
Author_Institution :
Technol. & Manuf. Group, Intel Corp., Hillsboro, OR, USA
Volume :
32
Issue :
9
fYear :
2011
Firstpage :
1170
Lastpage :
1172
Abstract :
Junctionless accumulation-mode (JAM) devices with channel lengths Lg down to 26 nm were fabricated on a trigate process and compared to conventional inversion-mode (IM) devices. This letter represents the first experimental comparison of short-channel JAM-to-IM devices at matched off-state leakage (Ioff) . The JAM devices show better channel mobility (when moderately doped) and lower gate capacitance than the IM control counterparts at matched Ioff. However, the JAM devices also show reduced gate control and degraded short-channel characteristics. The observed degraded behavior of JAM relative to IM is explained with the aid of device simulations and a simple analytic model of the channel charge.
Keywords :
accumulation layers; carrier mobility; leakage currents; semiconductor device models; transistors; channel charge model; channel length; channel mobility; gate capacitance; gate control; inversion mode device; junctionless accumulation-mode device; junctionless transistor; matched OFF-state leakage; short-channel JAM-to-IM device; size 26 nm; trigate transistor; Analytical models; Capacitance; Current measurement; Logic gates; Semiconductor process modeling; Silicon; Transistors; Accumulation mode; inversion mode (IM); trigate;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2011.2158978
Filename :
5937042
Link To Document :
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