DocumentCode :
1265928
Title :
A physical model for boron penetration through thin gate oxides from p/sup +/ polysilicon gates
Author :
Pfiester, James R. ; Parrillo, Louis C. ; Baker, Frank K.
Author_Institution :
Motorola Inc., Austin, TX, USA
Volume :
11
Issue :
6
fYear :
1990
fDate :
6/1/1990 12:00:00 AM
Firstpage :
247
Lastpage :
249
Abstract :
Based on numerical device and process simulation, it is shown that enhancement of the boron diffusivity by as much as 300 times in the thin gate oxide results in a very shallow exponential p-type profile in the underlying silicon substrate. The effect of fluorine and phosphorus coimplantation into the p-type polysilicon gate is modeled by changes in the boron diffusivity in the gate oxide and segregation at the polysilicon-oxide interface. An inverse PMOS short-channel behavior in which the threshold voltage becomes more negative with decreasing channel length is modeled by two-dimensional boron segregation effects caused by the poly gate oxidation.<>
Keywords :
boron; diffusion in solids; insulated gate field effect transistors; metal-insulator-semiconductor devices; semiconductor device models; surface segregation; PMOS capacitors; PMOS transistors; Si:B; Si:B-SiO/sub 2/; Si:F,P; channel length; diffusivity; p-type profile; p/sup +/ polysilicon gates; physical model; polysilicon-oxide interface; process simulation; segregation; short-channel behavior; thin gate oxides; threshold voltage; Annealing; Boron; Etching; Hydrogen; MOS devices; Oxidation; Semiconductor device modeling; Silicon; Temperature; Threshold voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.55269
Filename :
55269
Link To Document :
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