Title :
Low-Temperature Hybrid CMOS Circuits Based on Chalcogenides and Organic TFTs
Author :
Mejia, Israel ; Salas-Villasenor, Ana L. ; Avendano-Bolivar, Adrian ; Horvath, Julius ; Stiegler, Harvey ; Gnade, Bruce E. ; Quevedo-Lopez, Manuel A.
Author_Institution :
Dept. of Mater. Sci. & Eng., Univ. of Texas at Dallas, Richardson, TX, USA
Abstract :
In this letter, we demonstrate a fully integrated approach to fabricate cadmium sulfide (CdS)-pentacene complementary metal-oxide-semiconductor (CMOS) digital circuits compatible with flexible electronics. Low-cost and low-temperature chemical bath deposition is used to deposit CdS at 70°C with mobility values >; 10 cm2/V·s and threshold voltages around 5 V for fully integrated devices. p-MOS thin-film transistors were fabricated using thermally evaporated pentacene as semiconductor with mobility and threshold voltages in the range of 3×10-2 cm2/V·s and -3 V, respectively. The CMOS integration approach includes six mask levels with a maximum processing temperature of 100°C.
Keywords :
CMOS digital integrated circuits; cadmium compounds; organic semiconductors; thin film transistors; CdS; cadmium sulfide-pentacene complementary metal-oxide-semiconductor digital circuit; chalcogenides; flexible electronics; low-temperature chemical bath deposition; low-temperature hybrid CMOS circuit; organic TFT; p-MOS thin-film transistor; temperature 100 C; temperature 70 C; thermally evaporated pentacene; voltage -3 V; voltage 5 V; CMOS integrated circuits; Inverters; Logic gates; Pentacene; Thin film transistors; Cadmium sulfide (CdS); complementary metal–oxide–semiconductor (CMOS); flexible electronics; pentacene; thin-film transistor (TFT);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2011.2157801
