Hot carrier-induced degradation of gate overlapped lightly doped drain (GOLDD) polysilicon TFTs

Hot-carrier injection is known to produce interface states and oxide trapped charge, which, depending upon their spatial distribution, can strongly influence the local electric fields as well as the current flow. In this work, we analyze the hot carrier-induced degradation of gate overlapped lightly doped drain (GOLDD) polysilicon thin film transistors (TFTs) and a new model, which correlates the interface state generation with the hot carrier injection current, is proposed. The defect generation rate has been assumed to depend upon the product of hot electron and hole currents J_eh, and the resulting interface state distribution has been evaluated self-consistently with the current density and carrier concentration distributions. By successive iterations, a complete spatial and time evolution of the interface state distribution has been determined, and the electrical characteristics, calculated with these interface state distributions are in good agreement with the experimental data